Architectures for Error Control in Analog Subthreshold CMOS

Motivated by the potential to reuse the architecture in place for an analog sum-product decoder, and thus reduce circuit space, we show how an analog encoder may be constructed for a class of reversible LDPC codes. We review the basic building blocks of analog decoder design for subthreshold CMOS circuits and then show how these components may be reused for encoding. We present an encoder circuit design which operates by performing the Jacobi method for iterative matrix inversion of finite field matrices in continuous time.